|Course Code: BCA215||
Course Title: Computer Organization (4 Credits)
Unit 1: Computer Evolution: Brief history of Computer, Mechanical and Electromechanical Ancestors, Classification of Computer, Designing for performance, Structure of a Computer System, Arithmetic Logic Unit, Control Unit, Bus Structure, Von Neumann Architecture.
Unit 2: Basic Arithmetic Operations: Integer Addition and Subtraction , Fixed and Floating point numbers, Floating point representation., Signed numbers, Binary Arithmetic, 1’s and 2’s Complements Arithmetic, 2’s Complement method for multiplication, Booths Algorithm, Hardware Implementation, IEEE Standards, Floating Point Arithmetic , The accumulator, Shifts, Carry and Overflow
Unit 3: Central Processing Unit and Instructions: Instruction Characteristics, CPU with Single BUS, Types of Operands, Types of Operations, Addressing Modes, Instruction Formats.
Unit 4: Processor Organization: Parallelism and Computer Arithmetic , Parallelism, Computer arithmetic, Computer arithmetic associativity, Floating Point in the 8086, Programmers Model of 8086, Max/Min Mode, Minimum mode, Maximum mode, Register Organization, 8086 general purpose Registers, 8086 segment registers, 8086 special purpose registers, Instruction Cycles, Read Write cycles, Read cycle, Write cycle, Addressing Modes.
Unit 5: Control Unit Design: Micro operations, Micro operations of Fetch cycle, Indirect Cycle, The execute cycle, The Instruction cycle, Control of the CPU, Functional Requirements, Control Signals, Data paths and control signals, Data Path inside A CPU, Single bus structure, Two bus structure, Three bus structure, Execution of a complete instruction, Branching, Sequencing of Control Signals, Hardwired Control Unit, Micro-Programmed Control
Unit 6: Memory Organization: Characteristics of Memory Systems, Main Memory, Types of Random-Access Memory and ROM, Organization, Static and dynamic memories, Memory system considerations, Design of memory subsystem using Static Memory Chips, Design of memory subsystem using Dynamic Memory Chips, Memory interleaving
Unit 7: High Speed Memories: Cache Memory, Principles of cache memory, Structure of cache and main memory, Performance using cache memory, Elements of Cache Design, Mapping functions, Replacement algorithms, External Memory, Virtual memory, Memory Management in Operating Systems
Unit 8: Secondary Memory: Magnetic Disk and Tape, Digital Audio Tape (DAT), RAID, Optical memory
Unit 9: I/O Organization – Part 1: Need of I/O Module, External Devices , Input / Output Module, I/O Module Function, I/O Module Decisions, Input Output Techniques, Programmed I/O, I/O commands, I/O instructions, Interrupt Driven I/O, Basic concepts of an Interrupt , Response of CPU to an Interrupt, Design Issues, Priorities, Interrupt handling, Types of Interrupts
Unit 10: I/O Organization – Part 2: Data Transfer Techniques, Data Memory Access, Intel 8237, Buses, Bus arbitration, Types of buses, I/O Interface, Synchronous and Asynchronous Data Transfer, Synchronous data transfer, Asynchronous data transfer, Parallel I/O 8255 , Serial I/O 8251, PCI, SCSI Bus, Serial I/O, Case let: Program Controlled I/O
Unit 11: Peripherals: Peripherals, Input Devices, Output Devices, Video displays, Printers
Unit 12: Multiprocessor Configuration: Multiprocessing, Advantages and disadvantages of multiprocessing, Multiprogramming vs. Multiprocessing, Coupled Multiprocessor, Closely coupled multiprocessor, Loosely coupled multiprocessor, Comparison between closely coupled and loosely coupled Multiprocessor, Contention problems in multiprocessor systems, Memory contention, Communication Contention, Hot Spot contention, Techniques for reducing contention, Coprocessor, I/O Processor, CPU-IOP communication, Channel
Unit 13 Microprogramming: Basic Principles, Features of microprogramming, Hardwired vs. micro programmed computers, Applications and advantages of microprogramming, Limitations of microprogramming, Computer Clock, Microinstructions and its timing, Microinstruction format, Microinstruction timing, Control Path, Microcode, Fully horizontal microcode, Fully vertical microcode, Machine Instructions
Unit 14 Parallel Organization : Parallel Organization, Instruction Set Architecture(ISA), RISC and CISC, Characteristics of CISC, Characteristics of RISC, RISC versus CISC, Instruction set complexity- RISC versus CISC, Vector Processing Requirements, Characteristics of vector processing, Multiple vector task dispatching, Super Scalar Processors, The emergence and spread of super scalar processors, Specific task of Super scalar processing, Super Scalar Instruction Issue, The design space , Issue policies, Instruction issue policies of scalar processors, Instruction issue policies of superscalar processors.