Computer Architecture

Course Code: BIT204

Course Title: Computer Architecture (4 Credits)




Course Contents


Unit 1- Fundamentals of Computer Architecture- Computational model, Evolution of computer architecture, process thread, Concurrent and parallel execution, types of parallelism, levels of parallelism.


Unit 2- Fundamentals of computer design- The changing face of computing and the task of the computer designer, technology trends, Quantitative principles of computer design, Power consumption and efficiency of the matrix.                                                                            


Unit 3-Instruction set principles – Classifying instruction set architecture, memory addressing, address modes for signal processing, Operations in the instruction sets, instruction for control flow, MIPS architecture.


Unit 4-Pipelined processor- Review of Pipelining, Examples of some pipeline in modern processors, pipeline hazards, data hazards, control hazards. Techniques to handle hazards, performance improvement with pipelines and effect of hazards on the performance, Design space of pipelines, Pipeline instruction processing, Pipelined execution of integer and Boolean instructions – the design space.


Unit 5-Design space of pipelines- Introduction, Pipeline instruction Processing, Pipelined execution of Integer and Boolean Instructions, Pipelined processing of loads and stores.


Unit 6-Instruction-level parallelism and its dynamic exploitation-  Concepts, overcoming data hazards with dynamic schedule, Dynamic scheduling examples and algorithm, High performance instruction delivery, hardware based speculation.


Unit 7- Exploiting  Instruction-level parallelism with software approach-  Basic compiler techniques for exposing ILP, Static branch prediction, The Intel IA-64 architecture and Itanium processor, ILP in the embedded and mobile markets, ILP in the embedded and mobile markets.


Unit 8- Memory Hierarchy technology- Cache memory organization, Cache addressing modes, direct mapping and associative caches, Elements of cache design, Techniques to reduce cache misses via parrallelism, techniques to reduce cache penalties, technique to reduce cache hit time, Shared memory organization, Interleaved memory organization, bandwidth and fault tolerance, Sequential and weak consistency model.


Unit 9- Vector processors- Use and effectiveness, memory to memory vector architectures, vector register architecture, vector length and stride issues, compiler effectiveness in vector processors.


Unit 10- SIMD Architecture- Introduction, Parallel Processing, classification of Parallel Processing, Fine-Grained SIMD Architecture, coarse-Grained SIMD Architecture


Unit 11- Vector architecture and MIMD Architecture-, addressing modes, instructions formats, effect of simplification on the performance, example processors such as MIPS, PA-RISC, SPARC, Power PC, etc.


Unit 12- Storage systems- introduction, types of storage devices, Connecting I/O devices to CPU/memory, reliability, availability and dependability, RAID, I/O performance measures.


Unit 13- Scalable, Multithreaded and data flow architecture-Principles of multithreading, Scalable and multithreaded architecture, Data Flow Graphs, Petri nets, Static & Dynamic DFA. Reduction computer architectures, Systolic Architectures. Different Models, Languages, Compilers, dependency Analysis. Message Passing, Program mapping to Multiprocessors, Synchronization.


Unit 14- Case Study: Basic Features of Current Architectural Trends. DSP Processor, Dual core Technology